Design of A 100MHz 64-Point FFT Processor in 0.35μm Standard CMOS Technology
نویسنده
چکیده
applications such as digital spectrum analyzers, digital filtering, image processing, and video transmission need to compute the Discrete Fourier Transform (DFT). A Chip architecture to compute a 64point DFT using radix-4 algorithm every 18.87 μs at 100MHz clock rate is designed. This processor incorporates static memory, controller, and combinational operating unit (COU). Input data and output data are 10-bit and 54-bit words, respectively. A 10-bit × 27-bit multiplier is used inside the processor. Two’s complement is used to present negative data. This processor is implemented in 0.35μm tsmc standard CMOS process. Key-Words: DFT, decimation in time, radix-4, COU, complex multiplier, decimation in frequency
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